1. Field of the Invention
The present invention relates to an arrangement of a plurality of MOSFET's (“metal oxide semiconductor field-effect transistor”) and a method of controlling the arrangement.
2. Description of Related Art
MOSFET's in integrated circuits are established components in semiconductor technology. In this context, one may make a distinction with regard to their design between horizontal and vertical MOSFET's. Thus the design and manner of functioning of horizontal MOSFET's are known, for example, from published German patent document DE 40 03 389, and of vertical MOSFET's from published European patent document EP 0 671 056 or EP 0 594 177. Vertical MOSFET's have a trench structure and offer the possibility of arranging many transistors in a particularly space-saving manner. The construction of a vertical n-channel MOSFET will now be briefly explained in light of FIG. 1. The MOSFET has three electrical contact areas that are known as source S, gate G and drain terminal D. It is typical for a vertical MOSFET that the drain terminal is not situated together with the two other, source S and gate G terminals on the same side of a semiconductor substrate, which is regarded as being the upper side of the semiconductor substrate. Instead, drain terminal D is situated on a side that is then to be designated as the back surface of the substrate. Therefore, drain terminal D directly contacts the lowest layer of the substrate, namely substrate layer Sub of a first conductivity type n, in this instance, an (N+) layer. On this substrate layer Sub, there is situated a drain region 20 also having first conductivity type n, in this instance, an (N−) layer. The “+” sign denotes a high doping concentration, and the “−” sign correspondingly denotes a low doping concentration. On drain region 20 there is situated a channel region 22 having a second conductivity type p, in this instance, a (p−) layer. In addition, a source region 24 is developed, having conductivity type n, in this case, an (N+) region. A gate electrode 26 fills the inner region of a trench 28, which extends from the upper part of source region 24 all the way through the entire layer thickness of channel region 22, to the upper part of drain region 20. Gate electrode 26 is electrically insulated from the surrounding regions by an insulation 30, made typically of an oxide such as SiO2. Finally, a source electrode 32 is provided which is directly connected to source region 24.
If a voltage is applied between source S and drain terminal D, nevertheless, no current can flow since channel region 22 of (p−) type, that is, a region having many holes and very few electrons, is situated between the two terminals. The MOSFET is in a blocking state, that is, it is nonconductive or “normally off”. This blocking state can be removed by changing the electrical conductivity of channel region 22 between source S and drain terminal D by applying a positive voltage at gate terminal G. The positive voltage applied at gate terminal G leads to an enhancement of electrons in a side region of trench 28, between source S and drain region D. The electrons attracted by positive gate electrode 26, as free charge carriers, form a conductive n channel in an otherwise nonconductive channel region 22, that is, the MOSFET is transferred overall to a conductive state. A decrease in the positive gate voltage to zero again yields a blocking MOSFET. Control of the MOSFET state is possible, in principle, by the applied gate voltage.
As was described before, gate electrode 26 is surrounded by an insulation 30. This brings about two capacitive linkages at the MOSFET. As is shown in FIG. 2, first parasitic capacitance 40 comes about between source S and gate terminal G, and second parasitic capacitance 42 comes about between gate G and drain terminal D. If these capacitances 40, 42 are big enough, they lead to electric charges on gate electrode 26 being stored and remaining too, once a voltage has been applied to gate terminal G. In order to switch off the MOSFET again, that is, to transfer it into a blocking state, gate electrode 26 has to be discharged, so that the gate-source voltage is reduced to zero. Otherwise, the MOSFET remains in a conductive state.
Therefore there is a need for a design approach to the objective of being able to transfer the transistor at any time into a blocking state, even in response to a lacking electrical connection between gate electrode 26 and a direct wiring of the transistor.